The Full-Bridge topology is the most common topology in the industry for designs with a maximum power higher than 500W. In the last years, LLC (specially with new semiconductor technology, GaN and SiC) are becoming a trending topic but, the use of Full-Bridge is still very popular.
MODULATION AT FULL BRIDGE
The Full-Bridge converter is tipically modulated with PWM or Phase Shift modulations. This modulations apply to the transformer a waveform as presented in Figure 1. The input voltage is applied during the PW in positive and negative (in order to avoid saturation of the transformer) and a zero interval called dead time (DT) is common in these modulations.
TRANSFORMER KEY ASPECTS
The key aspects to be presented in this app note are:
1. The importance of the leakage inductance.
2. The use of the magnetizing inductance for ZVS.
Leakage inductance (Llk) is very important for a lot of reasons, but only 3 will highlight here:
- ZVS: In order to achieve soft switching in the semiconductors (specially in MOSFET), we have to discharge the parasitic capacitance during the DT. The energy needed for discharging this capacitance is the energy stored in the Llk. That is ELK > Ecoss, where Elk = 0,5 x Llk x I2T. As it is observed, the energy depends on the current through the transformer and for this reason, at lower load states it is more difficult to achieve ZVS.
- Effective Duty Cycle Loss: As it is expected, including an inductance in series with an ideal transformer will affect the total energy transfered; this inductance limits the slope of the current and reduce the effective duty cycle applied to the transformer and therefore, the total energy transfered.
- Oscillations: The Llk resonates with the secondary side diode capacitance and its own transformer capacitance, this resonance can breakdown the diodes and provoke spikes if it is not limited. This problem can be solved modifying the resonant or including a snubber. The Figure 2 has been obtained using a non disipative snubber for limiting the peaks.
The use of magnetizing inductance (Lm) for ZVS is a strategy that usually happens naturally, at low power levels, when the load main current energy stored in Llk is not enough for discharging the capacitances, the current through the LM helps. This current depends only on the voltage applied to the transformer. This strategy increase conduction losses and it is only recomended when the original transformer design has a very high value of LM and reducing it will not affect to the main behavior of the circuit.
Design a good full bridge transformer will help you to have a smooth project, with less EMI noise, reliability of the semiconductors and better efficiency. These key paramenters are very important for a propper design.